I am reading the ARM Cortex-A720 Optimization Guide, which states:

In synchronous tag checking mode, each store must complete a tag check before the next store can be executed.

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What exactly does “executed” mean in this context at the microarchitectural level?

Specifically:

• Does it refer to issue/dispatch?

• Or to completion/retirement?

• Or to reach the L1 data cache?

Also, can the next store instruction still perform its tag check before the previous store completes its tag check?

In other words, is tag checking itself allowed to overlap between consecutive store instructions, or is it also serialized?

I am trying to understand whether this implies full store-to-store serialization or only serialization of the tag-check stage.