I know there could be multiple ways to communicate between Nios V processor and FPGA, such as AXI4 / Avalon bus and memory-mapped addresses (e.g. to read a register in FPGA), etc. However, I am still confused on how to do this in the following example.

Suppose I have an array multiplication example running in Nios V process in C code in which I want to throw the array multiplication kernel to run in FPGA. This is a typical example to show how to run a program in GPU where we simply create and fill in the two arrays A & B in the host. Then, we create two arrays AGPU & BGPU in the GPU device memory and fill these two arrays with A & B content. Finally, we call the multiplication kernel in GPU from the host by passing the kernel name and data in AGPU & BGPU and return the calculation result back to the host.

What should be the procedure to run this array multiplication example in FPGA from a Nios V processor? Could somebody give out some codes here? Specifically, 1. how the data in array A&B in Nios V processor be passed over to FPGA arrays A_FGPA & B_FPGA; 2. how the FPGA function could be called from Nios V processor.

Thank you.