Do CUDA 8.6 architectures support FP64 tensor core operations?
I am seeing potentially conflicting information.
In the programming guide, Table 33 doesn't indicate that FP64 is supported as an input data type.
In section 5.4.11.3, I encounter the statement "Tensor Cores support double-precision floating point operations on devices with compute capability 8.0 and higher...".
Since 8.6>8.0, we have a possible contradiction.
What am I missing?