Q.1 What is the primary purpose of Pulse Width Modulation (PWM) in power electronic converters?
To increase the supply voltage
To control the average output voltage by varying the duty cycle
To reduce the switching frequency
To eliminate the need for inductors
Explanation - PWM adjusts the width of each pulse within a fixed period, thereby controlling the average voltage seen by the load.
Correct answer is: To control the average output voltage by varying the duty cycle
Q.2 In a single‑phase full‑bridge inverter using sinusoidal PWM, the carrier frequency is 10 kHz. If the modulation index is 0.8, what is the fundamental output frequency?
50 Hz
400 Hz
800 Hz
1 kHz
Explanation - The fundamental frequency is set by the reference sinusoid, which is usually the mains frequency (50 Hz or 60 Hz) independent of carrier frequency and modulation index.
Correct answer is: 50 Hz
Q.3 Which waveform is commonly used as the carrier in bipolar PWM?
Triangular wave
Square wave
Sawtooth wave
Sinusoidal wave
Explanation - A symmetrical triangular wave provides a linear rise and fall, making it ideal for generating equal‑area positive and negative pulses in bipolar PWM.
Correct answer is: Triangular wave
Q.4 For a given switching frequency, increasing the PWM switching frequency will:
Increase the size of the output filter inductance required
Decrease the total harmonic distortion (THD)
Increase the voltage stress on the power devices
Both B and C
Explanation - Higher switching frequency pushes harmonics higher, reducing THD, but also increases voltage stress due to faster transitions.
Correct answer is: Both B and C
Q.5 In a unipolar PWM scheme, the voltage applied to the load can take which of the following values?
+V, 0, -V
+V/2, -V/2
+V, -V
+V, 0, -V/2
Explanation - Unipolar PWM switches each leg of the inverter to either +V/2 or –V/2, eliminating the zero‑voltage state present in bipolar PWM.
Correct answer is: +V/2, -V/2
Q.6 The modulation index (m) in sinusoidal PWM is defined as:
Carrier amplitude / reference amplitude
Reference amplitude / carrier amplitude
Switching frequency / fundamental frequency
Duty cycle / period
Explanation - m = V_ref_peak / V_carrier_peak; it determines the amplitude of the fundamental component of the output.
Correct answer is: Reference amplitude / carrier amplitude
Q.7 Which of the following PWM techniques reduces low‑order harmonic content the most?
Sinusoidal PWM
Space Vector PWM
Random PWM
Phase‑Shifted PWM
Explanation - Space Vector PWM (SVPWM) optimally utilizes the DC bus voltage and reduces the magnitude of low‑order harmonics compared to basic SPWM.
Correct answer is: Space Vector PWM
Q.8 In a three‑phase inverter, the phase shift between the carrier signals in a phase‑shifted PWM scheme is:
0°
30°
60°
90°
Explanation - A 60° shift between the three carrier signals ensures equal switching events per phase and reduces common‑mode voltage.
Correct answer is: 60°
Q.9 What is the effect of increasing the duty cycle from 30% to 70% in a buck converter using PWM?
Output voltage decreases
Output voltage remains the same
Output voltage increases
Switching frequency doubles
Explanation - In a buck converter, V_out = D × V_in; increasing D raises the average output voltage.
Correct answer is: Output voltage increases
Q.10 Which PWM method uses two interleaved carrier signals of the same frequency but 180° out of phase?
Bipolar PWM
Unipolar PWM
Phase‑Shifted PWM
Delta Modulation
Explanation - Phase‑Shifted PWM with two carriers 180° apart reduces the ripple in the line‑to‑line voltage of a two‑level inverter.
Correct answer is: Phase‑Shifted PWM
Q.11 The term 'dead‑time' in PWM switching refers to:
Time when both switches of a half‑bridge are ON
Time when both switches of a half‑bridge are OFF
Time taken for the carrier to complete one cycle
Time required for the load to respond
Explanation - Dead‑time prevents shoot‑through by ensuring a brief period where both transistors are off before the opposite one turns on.
Correct answer is: Time when both switches of a half‑bridge are OFF
Q.12 In a PWM inverter, the term 'carrier frequency' is most closely related to:
Fundamental output frequency
Switching speed of the power devices
Amplitude of the output voltage
Load resistance
Explanation - Carrier frequency determines how fast the PWM pulses are generated, i.e., the switching speed of the devices.
Correct answer is: Switching speed of the power devices
Q.13 Which of the following best describes the harmonic spectrum of a PWM signal with a high modulation index (m≈1)?
Dominated by low‑order harmonics
Harmonics are clustered around multiples of the carrier frequency
Only the fundamental frequency is present
Harmonics are uniformly spread across the spectrum
Explanation - When m≈1, the PWM waveform contains sidebands around each carrier harmonic (k·f_c ± f_ref).
Correct answer is: Harmonics are clustered around multiples of the carrier frequency
Q.14 In a three‑level NPC (Neutral Point Clamped) inverter, the PWM technique that minimizes the number of switching transitions is:
Sinusoidal PWM
Space Vector PWM
Phase‑Shifted PWM
Selective Harmonic Elimination PWM
Explanation - SE‑PWM chooses switching angles to eliminate specific harmonics, often reducing the total number of transitions.
Correct answer is: Selective Harmonic Elimination PWM
Q.15 For a PWM controlled DC‑DC buck converter, the ripple current in the output inductor is primarily a function of:
Carrier frequency only
Duty cycle only
Both carrier frequency and duty cycle
Input voltage only
Explanation - Inductor ripple ΔI_L = (V_in - V_out)·D / (L·f_sw); both D and f_sw (carrier frequency) affect the ripple magnitude.
Correct answer is: Both carrier frequency and duty cycle
Q.16 What is the main advantage of using a triangular carrier over a sawtooth carrier in PWM generation?
Triangular carrier provides symmetric rising and falling slopes, reducing harmonic distortion
Sawtooth carrier is easier to generate
Triangular carrier reduces switching losses
Sawtooth carrier eliminates dead‑time
Explanation - Symmetry in the carrier waveform leads to equal positive and negative pulse widths, lowering even‑order harmonics.
Correct answer is: Triangular carrier provides symmetric rising and falling slopes, reducing harmonic distortion
Q.17 In a PWM inverter, the term 'modulation bandwidth' refers to:
The range of carrier frequencies that can be used
The highest frequency of the reference signal that can be accurately reproduced
The voltage range of the DC bus
The width of each PWM pulse
Explanation - Modulation bandwidth is limited by the switching frequency; beyond a fraction of it, the PWM cannot follow the reference.
Correct answer is: The highest frequency of the reference signal that can be accurately reproduced
Q.18 Which PWM technique directly synthesizes the space vector of the desired output voltage?
Sinusoidal PWM
Space Vector PWM
Phase‑Shifted PWM
Random PWM
Explanation - SVPWM calculates switching vectors that approximate the desired voltage space vector within each switching period.
Correct answer is: Space Vector PWM
Q.19 The primary reason for adding a low‑pass filter after a PWM inverter output is:
To increase the switching frequency
To remove the high‑frequency carrier components and obtain a sinusoidal voltage
To reduce the DC bus voltage
To protect the inverter from over‑current
Explanation - The filter attenuates carrier frequency harmonics, leaving the fundamental sinusoid for the load.
Correct answer is: To remove the high‑frequency carrier components and obtain a sinusoidal voltage
Q.20 When using a high‑frequency PWM carrier (e.g., 50 kHz) for a 60 Hz output, the dominant switching losses are:
Conduction losses
Switching losses
Core losses in the transformer
Thermal losses in the load
Explanation - Higher carrier frequency causes more frequent turn‑on/turn‑off events, increasing switching losses in semiconductor devices.
Correct answer is: Switching losses
Q.21 In a PWM based chopper circuit, the average output voltage is:
V_in × (1 - D)
V_in × D
V_in / D
V_in × √D
Explanation - For a simple on‑off chopper, V_out = D·V_in where D is the duty cycle.
Correct answer is: V_in × D
Q.22 What is the effect of increasing the modulation index beyond 1 in sinusoidal PWM?
The inverter enters over‑modulation, producing a distorted waveform
The output voltage continues to increase linearly
The carrier frequency doubles
The switching devices operate at lower stress
Explanation - When m > 1, the reference exceeds the carrier amplitude, causing clipping and nonlinear operation.
Correct answer is: The inverter enters over‑modulation, producing a distorted waveform
Q.23 Which PWM scheme is most suitable for minimizing electromagnetic interference (EMI) in high‑frequency inverters?
Deterministic PWM
Random PWM (RPWM)
Sinusoidal PWM
Phase‑Shifted PWM
Explanation - RPWM spreads the spectral energy of switching noise over a wider band, reducing peak EMI levels.
Correct answer is: Random PWM (RPWM)
Q.24 In a dual‑phase interleaved boost converter, the effective ripple frequency of the input current is:
Same as the carrier frequency
Twice the carrier frequency
Half the carrier frequency
Independent of carrier frequency
Explanation - Interleaving two phases with 180° shift doubles the ripple frequency, reducing input current ripple.
Correct answer is: Twice the carrier frequency
Q.25 The minimum achievable duty cycle in a PWM controlled buck converter is limited by:
Maximum switching frequency
Dead‑time insertion
Input voltage rating
Load resistance
Explanation - Dead‑time creates a minimum off‑time; if it becomes a significant fraction of the period, the duty cycle cannot be reduced further.
Correct answer is: Dead‑time insertion
Q.26 Which of the following is NOT a common method for reducing harmonic distortion in PWM inverters?
Increasing carrier frequency
Selective Harmonic Elimination (SHE)
Using a purely resistive load
Space Vector Modulation
Explanation - The load type does not directly affect the generation of harmonics; the other methods actively shape the PWM waveform.
Correct answer is: Using a purely resistive load
Q.27 In a PWM inverter, the term 'line‑to‑line voltage' refers to:
Voltage between any two phases
Voltage between a phase and neutral
Peak voltage of the carrier
DC bus voltage
Explanation - Line‑to‑line voltage is the voltage measured across two phases, e.g., V_AB, V_BC, or V_CA.
Correct answer is: Voltage between any two phases
Q.28 When the PWM carrier frequency is much higher than the fundamental frequency, the output voltage waveform can be approximated as:
A square wave
A pure sinusoid
A series of impulses
A stepped DC level
Explanation - High carrier frequency pushes switching harmonics far from the fundamental, making the filtered output close to a sinusoid.
Correct answer is: A pure sinusoid
Q.29 In a PWM-controlled motor drive, increasing the PWM frequency generally results in:
Higher audible noise
Reduced motor torque ripple
Increased motor speed
Lower inverter efficiency
Explanation - Higher switching frequency reduces the amplitude of torque ripple caused by current ripple in the motor.
Correct answer is: Reduced motor torque ripple
Q.30 The term 'carrier‑reference method' in PWM generation means:
Comparing a high‑frequency carrier with a low‑frequency reference signal
Using the carrier as the output voltage
Modulating the carrier amplitude with the reference
Synchronizing the carrier with the grid
Explanation - PWM is generated by comparing a fast carrier waveform with a slower reference (sinusoid) to decide the switch state.
Correct answer is: Comparing a high‑frequency carrier with a low‑frequency reference signal
Q.31 For a PWM inverter supplying a 3‑phase load, the minimum number of distinct switching states required per PWM period is:
2
3
4
6
Explanation - A three‑phase inverter has six active voltage vectors (states) that can be selected within each PWM period.
Correct answer is: 6
Q.32 In a PWM scheme, the 'duty cycle' is defined as:
The ratio of carrier frequency to reference frequency
The proportion of one PWM period that the switch is ON
The ratio of output voltage to input voltage
The time delay introduced by dead‑time
Explanation - Duty cycle D = t_ON / T_period, directly controlling the average output voltage.
Correct answer is: The proportion of one PWM period that the switch is ON
Q.33 In a two‑level inverter using sinusoidal PWM, the maximum achievable fundamental voltage amplitude (neglecting over‑modulation) is:
V_DC
V_DC / 2
V_DC × √2 / π
V_DC / √2
Explanation - With a modulation index of 1, the peak line‑to‑line fundamental voltage is V_DC / √3 for three‑phase; for a single phase, the maximum fundamental is V_DC / 2.
Correct answer is: V_DC / 2
Q.34 Which PWM technique uses a set of pre‑computed switching angles to cancel specific harmonic orders?
Sinusoidal PWM
Selective Harmonic Elimination PWM
Random PWM
Phase‑Shifted PWM
Explanation - SHE-PWM solves transcendental equations to find switching angles that nullify targeted harmonics.
Correct answer is: Selective Harmonic Elimination PWM
Q.35 In a PWM controlled boost converter, the relationship between output voltage and duty cycle is:
V_out = V_in × (1 - D)
V_out = V_in / (1 - D)
V_out = V_in × D
V_out = V_in / D
Explanation - Boost converters increase voltage; the ideal equation is V_out = V_in / (1 - D).
Correct answer is: V_out = V_in / (1 - D)
Q.36 The primary reason for using a dead‑time of 1 µs in a 10 kHz PWM inverter is:
To increase the fundamental voltage
To prevent shoot‑through current between complementary switches
To reduce harmonic distortion
To synchronize with the grid
Explanation - Dead‑time ensures that both high‑side and low‑side transistors are never on simultaneously.
Correct answer is: To prevent shoot‑through current between complementary switches
Q.37 In a three‑phase inverter, the line‑to‑line voltage ripple frequency is:
Carrier frequency
Fundamental frequency
Twice the carrier frequency
Carrier frequency plus/minus fundamental
Explanation - Sideband frequencies appear at k·f_c ± f_ref, where f_c is carrier frequency and f_ref is fundamental.
Correct answer is: Carrier frequency plus/minus fundamental
Q.38 Which of the following statements about over‑modulation in PWM is true?
It reduces total harmonic distortion
It allows the output voltage to exceed the DC bus voltage
It results in a clipped sinusoidal reference, creating flat‑top waveforms
It eliminates the need for a filter
Explanation - Over‑modulation occurs when the reference exceeds the carrier amplitude, causing clipping and a quasi‑square output.
Correct answer is: It results in a clipped sinusoidal reference, creating flat‑top waveforms
Q.39 In a PWM-controlled inverter, the term 'carrier amplitude' refers to:
Peak value of the high‑frequency triangular wave
Maximum output voltage of the inverter
Amplitude of the fundamental sinusoid
DC bus voltage magnitude
Explanation - Carrier amplitude is the peak of the triangular (or sawtooth) waveform used for comparison with the reference.
Correct answer is: Peak value of the high‑frequency triangular wave
Q.40 A PWM inverter uses a carrier frequency of 5 kHz and a fundamental frequency of 50 Hz. How many carrier cycles occur in one fundamental period?
10
50
100
250
Explanation - Period of fundamental = 1/50 s = 20 ms. Carrier period = 1/5 kHz = 0.2 ms. 20 ms / 0.2 ms = 100 cycles.
Correct answer is: 100
Q.41 In a PWM system, increasing the reference amplitude while keeping carrier amplitude constant causes:
Decrease in modulation index
Increase in modulation index
No change in output voltage
Decrease in switching frequency
Explanation - Modulation index m = V_ref / V_carrier; raising V_ref raises m.
Correct answer is: Increase in modulation index
Q.42 The main disadvantage of Random PWM (RPWM) compared to deterministic PWM is:
Higher peak harmonic levels
Increased EMI at specific frequencies
Complexity in implementation and possible increase in total harmonic distortion (THD)
Reduced switching frequency range
Explanation - RPWM spreads the spectrum but may increase overall THD and requires more sophisticated control logic.
Correct answer is: Complexity in implementation and possible increase in total harmonic distortion (THD)
Q.43 In a PWM inverter with a three‑phase output, the line‑to‑neutral voltage amplitude is related to the line‑to‑line amplitude by:
V_LN = V_LL / √3
V_LN = √3 × V_LL
V_LN = V_LL / 2
V_LN = V_LL
Explanation - For a balanced three‑phase system, V_LN = V_LL / √3.
Correct answer is: V_LN = V_LL / √3
Q.44 Which PWM technique is most suitable for a multilevel inverter to achieve a low total harmonic distortion with a reduced number of switching actions?
Sinusoidal PWM
Space Vector PWM
Nearest Level Modulation
Phase‑Shifted PWM
Explanation - SVPWM can be extended to multilevel topologies, optimizing voltage vector selection and minimizing switching.
Correct answer is: Space Vector PWM
Q.45 In a PWM-controlled buck‑boost converter, the output voltage polarity is:
Always positive
Always negative
Same as input voltage polarity
Opposite to input voltage polarity
Explanation - Buck‑boost topology inverts the output voltage relative to the input.
Correct answer is: Opposite to input voltage polarity
Q.46 The term 'carrier‑signal slope' in PWM influences:
The frequency of the fundamental component
The symmetry of the PWM waveform and thus the even‑order harmonic content
The DC bus voltage level
The dead‑time duration
Explanation - A symmetric carrier (equal rise/fall slopes) reduces even harmonics; asymmetric carriers can introduce them.
Correct answer is: The symmetry of the PWM waveform and thus the even‑order harmonic content
Q.47 In a PWM inverter, the term 'over‑modulation' is used when:
Modulation index m > 1
Carrier frequency exceeds 10 kHz
Duty cycle is less than 10%
Load is purely resistive
Explanation - Over‑modulation occurs when the reference amplitude exceeds the carrier amplitude (m > 1).
Correct answer is: Modulation index m > 1
Q.48 For a PWM inverter, the sideband frequencies that appear in the output spectrum are located at:
k·f_c ± f_ref where k = 1,2,3…
Multiples of the fundamental frequency only
Only at the carrier frequency
Only at DC
Explanation - Sidebands are generated by the interaction of carrier and reference frequencies.
Correct answer is: k·f_c ± f_ref where k = 1,2,3…
Q.49 Which of the following reduces the peak switching voltage stress in a PWM inverter?
Increasing the DC bus voltage
Using a lower carrier frequency
Employing soft‑switching techniques (e.g., ZVS)
Increasing the modulation index
Explanation - Zero‑Voltage Switching (ZVS) ensures that devices turn on/off when voltage across them is minimal, reducing stress.
Correct answer is: Employing soft‑switching techniques (e.g., ZVS)
Q.50 In a PWM controlled three‑phase inverter, the smallest number of PWM periods needed to realize one complete space‑vector sequence is:
1
2
3
6
Explanation - A complete SVPWM sequence typically uses six active vectors plus two zero vectors, requiring at least six sub‑intervals.
Correct answer is: 6
Q.51 When using a PWM technique with a carrier frequency of 20 kHz and a fundamental frequency of 60 Hz, the ratio of carrier to fundamental frequency is:
333
3333
120
200
Explanation - 20 kHz / 60 Hz = 333.33 ≈ 333.
Correct answer is: 333
Q.52 In a PWM controlled buck converter, if the input voltage is 48 V and the duty cycle is 0.4, the ideal output voltage is:
19.2 V
38.4 V
12 V
24 V
Explanation - V_out = D × V_in = 0.4 × 48 V = 19.2 V.
Correct answer is: 19.2 V
Q.53 Which PWM technique can be used to directly control the output voltage vector in a three‑phase inverter without using a carrier?
Direct Torque Control
Space Vector PWM
Sinusoidal PWM
Phase‑Shifted PWM
Explanation - SVPWM calculates the duty cycles based on the desired voltage vector, bypassing the need for a carrier waveform.
Correct answer is: Space Vector PWM
Q.54 In a PWM inverter, the term 'THD' stands for:
Total Harmonic Distortion
Thermal Heat Dissipation
Transient High‑frequency Deviation
Torque Harmonic Distribution
Explanation - THD quantifies the ratio of harmonic content to the fundamental in a voltage or current waveform.
Correct answer is: Total Harmonic Distortion
Q.55 For a PWM controlled three‑phase inverter, the line‑to‑line voltage fundamental amplitude V_LL is related to the modulation index m and DC bus voltage V_DC by:
V_LL = m × V_DC
V_LL = (√3/2) × m × V_DC
V_LL = m × V_DC / √3
V_LL = (2/√3) × m × V_DC
Explanation - In SPWM, V_LL_peak = (√3/2)·m·V_DC.
Correct answer is: V_LL = (√3/2) × m × V_DC
Q.56 When the PWM carrier frequency is increased, the required size of the output LC filter:
Increases
Decreases
Remains the same
Depends only on the load
Explanation - Higher carrier frequency pushes switching harmonics higher, allowing a smaller filter to achieve the same attenuation.
Correct answer is: Decreases
Q.57 In a dual‑phase interleaved boost converter, the effective ripple frequency of the input current is:
Carrier frequency
Twice the carrier frequency
Half the carrier frequency
Fundamental frequency
Explanation - Interleaving two phases 180° apart doubles the ripple frequency, reducing input current ripple.
Correct answer is: Twice the carrier frequency
Q.58 The purpose of using a 'soft‑switching' PWM technique is to:
Increase the switching frequency indefinitely
Reduce switching losses and electromagnetic interference
Eliminate the need for a DC bus capacitor
Double the output voltage
Explanation - Soft‑switching ensures transitions occur at zero voltage or zero current, minimizing losses and EMI.
Correct answer is: Reduce switching losses and electromagnetic interference
Q.59 In a PWM inverter, which of the following statements about dead‑time is correct?
Dead‑time increases the effective duty cycle
Dead‑time introduces a voltage error proportional to the load current
Dead‑time eliminates harmonic distortion
Dead‑time is only needed at low switching frequencies
Explanation - During dead‑time, both switches are off, causing a voltage drop proportional to the current flowing through the parasitic resistance.
Correct answer is: Dead‑time introduces a voltage error proportional to the load current
Q.60 For a PWM controlled buck converter with an inductance of 100 µH, switching frequency of 50 kHz, and duty cycle of 0.6, the peak-to-peak inductor current ripple ΔI_L is:
0.12 A
0.24 A
0.48 A
0.96 A
Explanation - ΔI_L = (V_in - V_out)·D / (L·f_sw) = (V_in - 0.6V_in)·0.6 / (100µH·50kHz) = 0.4V_in·0.6 / (5) = 0.24·V_in/5. Assuming V_in = 10 V → ΔI_L ≈ 0.24 A.
Correct answer is: 0.24 A
Q.61 In a PWM scheme, the term 'carrier frequency' is most directly related to:
The frequency of the sinusoidal reference
The rate at which the switch state can change
The amplitude of the output voltage
The DC bus voltage
Explanation - Carrier frequency determines how many PWM pulses occur per second, i.e., the switching rate.
Correct answer is: The rate at which the switch state can change
Q.62 Which PWM method is especially useful for reducing the common‑mode voltage in three‑phase inverters?
Bipolar PWM
Unipolar PWM
Phase‑Shifted PWM
Random PWM
Explanation - Unipolar PWM halves the voltage step between switching states, lowering common‑mode voltage.
Correct answer is: Unipolar PWM
Q.63 In a PWM inverter feeding a motor, the audible noise is most closely associated with:
Fundamental frequency
Carrier frequency and its harmonics
DC bus voltage
Load inertia
Explanation - Audible noise is generated by magnetic forces at the switching frequency and its low‑order harmonics.
Correct answer is: Carrier frequency and its harmonics
Q.64 The effect of increasing the modulation index from 0.5 to 0.9 in a sinusoidal PWM inverter is:
Decrease in output voltage magnitude
Increase in output voltage magnitude
No change in output voltage
Change in switching frequency
Explanation - Higher modulation index increases the amplitude of the fundamental component of the output.
Correct answer is: Increase in output voltage magnitude
Q.65 In a PWM system, the term 'carrier‑reference crossing' refers to:
The point where the carrier waveform reaches its peak
The instant when the reference sinusoid equals the carrier waveform
The time when the switch is turned off
The frequency where both signals intersect
Explanation - A PWM pulse is generated each time the reference crosses the carrier, determining the ON/OFF state.
Correct answer is: The instant when the reference sinusoid equals the carrier waveform
Q.66 In a three‑phase inverter employing space‑vector PWM, the zero‑vector duration is used to:
Increase the fundamental voltage
Balance the average voltage across phases
Reduce the switching losses
Both B and C
Explanation - Zero‑vector time helps to equalize the average voltages and reduces the number of switching transitions.
Correct answer is: Both B and C
Q.67 Which of the following best describes the relationship between switching frequency and EMI radiated by a PWM inverter?
Higher switching frequency always reduces EMI
Higher switching frequency shifts EMI to higher frequencies where attenuation is easier
Lower switching frequency eliminates EMI
Switching frequency has no impact on EMI
Explanation - EMI is moved to higher frequencies where filters and shielding are more effective, though total radiated power may increase.
Correct answer is: Higher switching frequency shifts EMI to higher frequencies where attenuation is easier
Q.68 In a PWM-controlled buck‑boost converter, the voltage conversion ratio is:
V_out = D × V_in
V_out = V_in / (1 - D)
V_out = V_in × (1 - D) / D
V_out = V_in × D / (1 - D)
Explanation - Buck‑boost converters combine buck and boost actions; the ideal relation is V_out = V_in·D/(1−D).
Correct answer is: V_out = V_in × D / (1 - D)
Q.69 For a PWM inverter with a modulation index of 0.8 and a DC bus voltage of 400 V, the peak line‑to‑line fundamental voltage is approximately:
138 V
277 V
320 V
400 V
Explanation - V_LL_peak = (√3/2)·m·V_DC = 0.866·0.8·400 ≈ 277 V.
Correct answer is: 277 V
Q.70 When using Selective Harmonic Elimination PWM, the number of switching angles needed to eliminate the 5th and 7th harmonics in a single‑phase inverter is:
2
3
4
5
Explanation - Each harmonic elimination adds two equations; two harmonics require four angles (assuming quarter‑wave symmetry).
Correct answer is: 4
Q.71 In a PWM-controlled inverter, the term 'carrier‑phase shift' refers to:
Phase shift between the three reference sinusoids
Phase shift between the carrier signals of different phases
Phase shift between the DC bus voltage and the output voltage
Phase shift introduced by dead‑time
Explanation - Carrier‑phase shift is used in phase‑shifted PWM to reduce common‑mode voltage and improve output quality.
Correct answer is: Phase shift between the carrier signals of different phases
Q.72 In a PWM inverter, the voltage step size during switching is directly proportional to:
Carrier frequency
DC bus voltage
Modulation index
Load resistance
Explanation - Each switching event changes the output voltage by a fraction of the DC bus voltage.
Correct answer is: DC bus voltage
Q.73 For a PWM buck converter, if the switching frequency is doubled while keeping the inductance and load constant, the peak‑to‑peak inductor ripple current:
Halves
Doubles
Remains unchanged
Triples
Explanation - ΔI_L ∝ 1/f_sw; doubling the frequency halves the ripple.
Correct answer is: Halves
Q.74 A PWM inverter with a carrier frequency of 15 kHz and a fundamental frequency of 50 Hz is operating in over‑modulation. The most likely observable effect on the output waveform is:
A pure sine wave
A flattened top (square‑like) waveform
Increased low‑frequency ripple
No change from normal operation
Explanation - Over‑modulation clips the sinusoidal reference, creating flat‑top sections in the PWM waveform.
Correct answer is: A flattened top (square‑like) waveform
Q.75 In a three‑phase PWM inverter, the line‑to‑line voltage THD is generally:
Higher than the phase voltage THD
Lower than the phase voltage THD
Equal to the phase voltage THD
Independent of the phase voltage THD
Explanation - Line‑to‑line voltages benefit from phase cancellation of certain harmonics, resulting in lower THD.
Correct answer is: Lower than the phase voltage THD
Q.76 When implementing PWM with a microcontroller, the typical method for generating the carrier waveform is:
Using a DAC to output a triangular wave
Using a hardware timer in PWM mode and comparing with a software reference
Using an analog comparator circuit only
Directly outputting the sinusoidal reference
Explanation - Microcontrollers often use a timer to generate a high‑frequency carrier and compare it with a calculated reference to produce PWM.
Correct answer is: Using a hardware timer in PWM mode and comparing with a software reference
Q.77 In a PWM-controlled inverter, increasing the dead‑time duration generally causes:
Higher output voltage
Reduced switching losses
Increased voltage distortion and a shift in the fundamental component
No effect on output waveform
Explanation - Dead‑time introduces a voltage drop during transitions, distorting the waveform and shifting the fundamental magnitude.
Correct answer is: Increased voltage distortion and a shift in the fundamental component
Q.78 The concept of 'carrier‑signal symmetry' is important because:
It determines the DC bus voltage
It eliminates the need for a filter
It ensures even‑order harmonics are minimized
It sets the fundamental frequency
Explanation - A symmetric carrier (equal rise/fall times) cancels even‑order harmonics in the PWM output.
Correct answer is: It ensures even‑order harmonics are minimized
Q.79 In a PWM buck‑boost converter, the output voltage polarity is:
Always the same as the input
Always opposite to the input
Dependent on the duty cycle
Independent of topology
Explanation - The buck‑boost topology inverts the polarity of the output relative to the input.
Correct answer is: Always opposite to the input
Q.80 Which of the following is a primary advantage of using Phase‑Shifted PWM in a three‑phase inverter?
Eliminates the need for a DC link capacitor
Reduces common‑mode voltage and spreads switching events over the period
Increases the fundamental frequency
Simplifies the control algorithm
Explanation - Phase‑shifted PWM staggers carrier signals, reducing peak common‑mode voltage and distributing switching losses.
Correct answer is: Reduces common‑mode voltage and spreads switching events over the period
Q.81 In a PWM inverter, the term 'modulation bandwidth' is limited by:
Maximum permissible duty cycle
Switching device voltage rating
Switching frequency and the filter's cutoff frequency
DC bus current rating
Explanation - The ability to reproduce fast changes in the reference is bounded by how fast the inverter can switch and how the filter attenuates higher frequencies.
Correct answer is: Switching frequency and the filter's cutoff frequency
Q.82 For a PWM-controlled inverter, the sideband frequencies that appear around the carrier harmonic k·f_c are spaced at:
Multiples of the fundamental frequency
k·f_c ± n·f_ref, where n = 1,2,…
Only at f_c
Only at DC
Explanation - Sidebands arise from the mixing of carrier and reference frequencies.
Correct answer is: k·f_c ± n·f_ref, where n = 1,2,…
Q.83 In a PWM inverter feeding a resistive load, increasing the modulation index from 0.6 to 0.9 will:
Decrease the RMS output voltage
Increase the RMS output voltage
Leave the RMS output voltage unchanged
Cause the inverter to stop working
Explanation - Higher modulation index increases the amplitude of the fundamental component, raising RMS voltage.
Correct answer is: Increase the RMS output voltage
Q.84 Which PWM technique typically requires solving transcendental equations to determine switching angles?
Sinusoidal PWM
Selective Harmonic Elimination PWM
Phase‑Shifted PWM
Random PWM
Explanation - SHE‑PWM involves solving equations that relate switching angles to the amplitudes of specific harmonics.
Correct answer is: Selective Harmonic Elimination PWM
Q.85 When a PWM inverter operates at a very high carrier frequency (e.g., >100 kHz), the dominant loss mechanism becomes:
Conduction loss
Switching loss
Core loss in the transformer
Resistive loss in the load
Explanation - Higher switching frequency increases the number of turn‑on/off events, making switching loss the dominant component.
Correct answer is: Switching loss
Q.86 In a three‑phase PWM inverter, the fundamental line‑to‑line voltage magnitude for a modulation index of 1.0 is:
V_DC
V_DC / √3
√3/2 × V_DC
V_DC / 2
Explanation - For sinusoidal PWM, V_LL_peak = (√3/2)·V_DC at m = 1.
Correct answer is: √3/2 × V_DC
Q.87 Which of the following PWM variants can directly eliminate the 3rd harmonic in a single‑phase inverter?
Sinusoidal PWM
Selective Harmonic Elimination PWM
Phase‑Shifted PWM
Random PWM
Explanation - SHE‑PWM can be designed to nullify specific harmonics such as the 3rd by choosing appropriate switching angles.
Correct answer is: Selective Harmonic Elimination PWM
Q.88 In a PWM buck converter, the relationship between the output voltage ripple (ΔV_out) and the output capacitor (C_out) is:
ΔV_out ∝ C_out
ΔV_out ∝ 1/C_out
ΔV_out ∝ √C_out
ΔV_out is independent of C_out
Explanation - A larger output capacitor stores more charge, reducing voltage ripple (ΔV = I_load·Δt / C).
Correct answer is: ΔV_out ∝ 1/C_out
Q.89 A PWM inverter with a DC bus of 600 V uses a modulation index of 0.7. What is the approximate RMS line‑to‑line voltage delivered to a balanced three‑phase load?
210 V
254 V
300 V
420 V
Explanation - V_LL_RMS = (√3/2)·m·V_DC / √2 = (0.866·0.7·600)/1.414 ≈ 254 V.
Correct answer is: 254 V
Q.90 In a PWM-controlled inverter, increasing the carrier frequency while keeping the modulation index constant will:
Increase the fundamental voltage amplitude
Decrease the fundamental voltage amplitude
Leave the fundamental voltage unchanged
Shift the fundamental frequency
Explanation - The fundamental amplitude depends on modulation index, not on carrier frequency.
Correct answer is: Leave the fundamental voltage unchanged
Q.91 The term 'dead‑time' is most critical for which type of power device configuration?
Three‑phase bridge with isolated gate drivers
Half‑bridge or full‑bridge with complementary MOSFETs or IGBTs
Single‑ended boost converter
Flyback converter with isolated secondary
Explanation - Dead‑time prevents both high‑side and low‑side devices from conducting simultaneously in complementary configurations.
Correct answer is: Half‑bridge or full‑bridge with complementary MOSFETs or IGBTs
Q.92 In a PWM inverter, the term 'modulation bandwidth' is limited primarily by:
The bandwidth of the DC bus capacitor
The switching speed of the power devices and the filter cut‑off frequency
The amplitude of the reference signal
The temperature rating of the semiconductor devices
Explanation - Fast switching and adequate filtering are needed to accurately reproduce higher‑frequency components of the reference.
Correct answer is: The switching speed of the power devices and the filter cut‑off frequency
Q.93 Which PWM method reduces common‑mode voltage by ensuring that only one switch per half‑bridge conducts at any time?
Bipolar PWM
Unipolar PWM
Phase‑Shifted PWM
Random PWM
Explanation - Unipolar PWM applies +V/2 or –V/2 to each leg, preventing simultaneous high‑voltage steps across the switches.
Correct answer is: Unipolar PWM
Q.94 In a PWM‑controlled boost converter, the ripple voltage on the output capacitor is primarily influenced by:
Switching frequency and output capacitance
Input voltage only
Modulation index only
Load resistance only
Explanation - Higher switching frequency and larger capacitance reduce the output voltage ripple.
Correct answer is: Switching frequency and output capacitance
Q.95 A PWM inverter uses a triangular carrier of 5 kHz and a sinusoidal reference of 50 Hz. How many PWM pulses are generated in one fundamental period?
10
50
100
200
Explanation - One fundamental period = 20 ms. Carrier period = 0.2 ms. 20 ms / 0.2 ms = 100 pulses.
Correct answer is: 100
Q.96 In a PWM scheme, the term 'reference signal' refers to:
The high‑frequency carrier waveform
The desired fundamental waveform (often sinusoidal) that determines the duty cycle
The DC bus voltage
The output voltage after filtering
Explanation - The reference is the low‑frequency signal compared with the carrier to produce PWM pulses.
Correct answer is: The desired fundamental waveform (often sinusoidal) that determines the duty cycle
Q.97 When using Space Vector PWM for a three‑phase inverter, the maximum achievable voltage vector magnitude is:
V_DC
V_DC / √2
V_DC / √3
V_DC / √6
Explanation - SVPWM can synthesize a voltage vector with magnitude up to V_DC/√3 (line‑to‑line basis).
Correct answer is: V_DC / √3
Q.98 Which PWM technique is especially suited for low‑frequency, high‑power applications where switching losses must be minimized?
High‑frequency sinusoidal PWM
Selective Harmonic Elimination PWM
Random PWM
Phase‑Shifted PWM
Explanation - SHE‑PWM reduces the number of switching events while eliminating targeted harmonics, making it ideal for low‑frequency high‑power systems.
Correct answer is: Selective Harmonic Elimination PWM
Q.99 In a PWM inverter, the term 'modulation index' is limited to a maximum value of:
0.5
0.8
1.0
1.5
Explanation - A modulation index of 1 corresponds to the reference reaching the carrier peak; beyond this, over‑modulation occurs.
Correct answer is: 1.0
Q.100 The main cause of audible noise in PWM motor drives is:
Fundamental frequency
Switching frequency and its low‑order harmonics
DC bus voltage
Load torque ripple
Explanation - Mechanical vibrations are excited by magnetic forces at the switching frequency and nearby harmonics, which fall within the audible range.
Correct answer is: Switching frequency and its low‑order harmonics
Q.101 When a PWM inverter is operated in over‑modulation, the output waveform becomes:
Pure sinusoidal
Clipped with a flat‑top shape
Pure square wave
Unchanged from linear modulation
Explanation - Over‑modulation causes the sinusoidal reference to exceed the carrier, producing flat‑top (quasi‑square) sections.
Correct answer is: Clipped with a flat‑top shape
Q.102 In a PWM‑controlled buck converter, the ripple voltage on the output capacitor is inversely proportional to:
Switching frequency
Inductance value
Load resistance
Input voltage
Explanation - Higher switching frequency reduces the time over which the capacitor must supply current, decreasing ripple.
Correct answer is: Switching frequency
Q.103 Which PWM technique uses two carriers that are 90° out of phase to reduce the total harmonic distortion?
Bipolar PWM
Unipolar PWM
Phase‑Shifted PWM
Selective Harmonic Elimination PWM
Explanation - Phase‑shifted PWM with 90° carrier shift distributes switching events, lowering THD.
Correct answer is: Phase‑Shifted PWM
Q.104 In a PWM inverter feeding a three‑phase motor, the line‑to‑line voltage fundamental frequency is:
Equal to the carrier frequency
Equal to the reference (fundamental) frequency
Half the reference frequency
Twice the reference frequency
Explanation - The fundamental frequency of the output is set by the reference sinusoid, not by the carrier.
Correct answer is: Equal to the reference (fundamental) frequency
Q.105 Increasing the PWM carrier frequency generally results in:
Higher total harmonic distortion (THD)
Lower switching losses
Reduced size of the output filter components
Lower output voltage amplitude
Explanation - Higher carrier frequency pushes harmonics away, allowing smaller inductors/capacitors to achieve the same attenuation.
Correct answer is: Reduced size of the output filter components
Q.106 In a PWM‑controlled buck‑boost converter, the output voltage polarity is:
Same as input
Opposite to input
Variable depending on duty cycle
Independent of topology
Explanation - Buck‑boost converters invert the output voltage relative to the input.
Correct answer is: Opposite to input
Q.107 For a PWM inverter with a modulation index of 0.9 and a DC bus voltage of 500 V, the peak line‑to‑line fundamental voltage is approximately:
389 V
433 V
500 V
550 V
Explanation - V_LL_peak = (√3/2)·m·V_DC = 0.866·0.9·500 ≈ 389 V.
Correct answer is: 389 V
Q.108 Which PWM method directly uses the space‑vector representation of the desired output voltage to compute duty cycles?
Sinusoidal PWM
Space Vector PWM
Phase‑Shifted PWM
Random PWM
Explanation - SVPWM calculates duty cycles from the target voltage vector in the complex plane.
Correct answer is: Space Vector PWM
Q.109 In a PWM inverter, the term 'carrier‑reference intersection' determines:
The amplitude of the DC bus
The exact moment to toggle the switch state (ON/OFF)
The frequency of the output voltage
The amount of dead‑time required
Explanation - Each crossing of carrier and reference signals defines a switching instant.
Correct answer is: The exact moment to toggle the switch state (ON/OFF)
Q.110 When a PWM inverter uses a carrier frequency that is an integer multiple of the fundamental frequency, the resulting sideband spectrum is:
Randomly distributed
Discrete and periodic at multiples of the carrier frequency
Only at the fundamental frequency
Continuous
Explanation - The interaction creates sidebands at k·f_c ± n·f_ref, giving a discrete spectrum.
Correct answer is: Discrete and periodic at multiples of the carrier frequency
Q.111 In a PWM buck converter, if the input voltage is 24 V and the duty cycle is 0.25, the ideal output voltage is:
6 V
12 V
18 V
24 V
Explanation - V_out = D·V_in = 0.25·24 V = 6 V.
Correct answer is: 6 V
Q.112 Which PWM technique can achieve the same voltage magnitude as sinusoidal PWM but with a reduced number of switching events?
Space Vector PWM
Random PWM
Phase‑Shifted PWM
Selective Harmonic Elimination PWM
Explanation - SVPWM utilizes the DC bus voltage more efficiently, achieving higher voltage with fewer switches.
Correct answer is: Space Vector PWM
Q.113 In a three‑phase PWM inverter, the line‑to‑line voltage fundamental component is:
√3 times the phase voltage fundamental
1/√3 times the phase voltage fundamental
Equal to the phase voltage fundamental
Zero
Explanation - For a balanced system, V_LL = √3·V_LN.
Correct answer is: √3 times the phase voltage fundamental
Q.114 When applying a dead‑time of 0 µs in a half‑bridge, the main risk is:
Excessive voltage ripple
Shoot‑through current causing device failure
Reduced output voltage
Increased switching frequency
Explanation - Without dead‑time, both switches may conduct simultaneously, creating a short circuit across the supply.
Correct answer is: Shoot‑through current causing device failure
Q.115 In a PWM inverter, the term 'carrier frequency' is most directly related to:
The amplitude of the output voltage
The speed of the PWM switching events
The fundamental frequency of the output
The DC link voltage
Explanation - Carrier frequency determines how many PWM cycles occur per second.
Correct answer is: The speed of the PWM switching events
Q.116 Which PWM technique typically uses a 50% duty‑cycle carrier to achieve minimum harmonic distortion?
Sinusoidal PWM
Unipolar PWM
Phase‑Shifted PWM
Selective Harmonic Elimination PWM
Explanation - Unipolar PWM with a symmetric carrier (50% duty) balances the waveform and reduces even‑order harmonics.
Correct answer is: Unipolar PWM
Q.117 In a PWM-controlled boost converter, the output voltage is higher than the input because:
The duty cycle is less than 0.5
Energy is stored in the inductor and released to the output at a higher voltage
The DC bus voltage is stepped up by a transformer
The converter uses a higher switching frequency
Explanation - During the OFF‑time, the inductor releases its stored energy adding to the input voltage, raising V_out.
Correct answer is: Energy is stored in the inductor and released to the output at a higher voltage
Q.118 For a PWM inverter with a 400 V DC bus and a modulation index of 0.6, the RMS line‑to‑line voltage is approximately:
138 V
173 V
200 V
277 V
Explanation - V_LL_RMS = (√3/2)·m·V_DC / √2 = (0.866·0.6·400)/1.414 ≈ 173 V.
Correct answer is: 173 V
Q.119 When a PWM inverter operates in linear modulation (m ≤ 1), the output voltage waveform is:
A square wave
A sinusoidal waveform with some ripple
A constant DC level
A random noise signal
Explanation - Linear modulation yields a fundamental sinusoid plus switching ripple at the carrier frequency.
Correct answer is: A sinusoidal waveform with some ripple
Q.120 Which of the following PWM methods is most effective at spreading the spectral energy of switching noise over a broad frequency range?
Sinusoidal PWM
Random PWM
Phase‑Shifted PWM
Selective Harmonic Elimination PWM
Explanation - Random PWM introduces randomness to the switching times, flattening the spectral peaks.
Correct answer is: Random PWM
Q.121 In a PWM inverter, the term 'carrier‑reference crossing' determines:
The amplitude of the DC bus voltage
When the switch changes state (ON/OFF)
The fundamental frequency of the output
The amount of dead‑time required
Explanation - Each crossing of the carrier and reference signals creates a PWM edge.
Correct answer is: When the switch changes state (ON/OFF)
Q.122 A PWM inverter uses a modulation index of 0.5. What is the effect on the fundamental output voltage compared to a modulation index of 1.0?
It doubles the fundamental voltage
It halves the fundamental voltage
It remains unchanged
It inverts the voltage polarity
Explanation - Fundamental voltage amplitude is directly proportional to the modulation index.
Correct answer is: It halves the fundamental voltage
Q.123 Which PWM technique is most commonly used in industrial variable‑frequency drives (VFDs) due to its balance of performance and computational simplicity?
Space Vector PWM
Sinusoidal PWM
Random PWM
Selective Harmonic Elimination PWM
Explanation - SPWM is simple to implement and provides acceptable THD for most VFD applications.
Correct answer is: Sinusoidal PWM
Q.124 In a PWM buck converter, if the inductance is increased while keeping all other parameters constant, the ripple current:
Increases
Decreases
Remains the same
Becomes zero
Explanation - Larger inductance stores more energy, smoothing current and reducing ripple.
Correct answer is: Decreases
Q.125 When a PWM inverter operates with a carrier frequency close to the audible range (e.g., 20 kHz), the audible noise perceived is mainly due to:
Fundamental frequency vibration
Magnetostriction at the carrier frequency and its lower harmonics
DC bus fluctuations
Load inertia
Explanation - Mechanical vibration caused by magnetic forces at switching frequencies in the audible range generates noise.
Correct answer is: Magnetostriction at the carrier frequency and its lower harmonics
Q.126 In a PWM inverter employing Space Vector PWM, the zero‑vector time is allocated to:
Increase the fundamental voltage
Balance the average voltage and reduce switching losses
Eliminate all harmonics
Increase the carrier frequency
Explanation - Zero‑vector periods help achieve the desired voltage while minimizing transitions.
Correct answer is: Balance the average voltage and reduce switching losses
Q.127 The modulation index for a sinusoidal PWM inverter is defined as:
Carrier amplitude divided by reference amplitude
Reference amplitude divided by carrier amplitude
Switching frequency divided by fundamental frequency
Duty cycle multiplied by carrier frequency
Explanation - m = V_ref_peak / V_carrier_peak.
Correct answer is: Reference amplitude divided by carrier amplitude
Q.128 In a PWM inverter, increasing the dead‑time will cause a shift in the output voltage fundamental component because:
Dead‑time adds extra voltage during each switching event
Dead‑time changes the effective duty cycle
Dead‑time raises the DC bus voltage
Dead‑time reduces the carrier frequency
Explanation - Dead‑time reduces the ON‑time of each switch, effectively lowering the duty cycle and thus the average voltage.
Correct answer is: Dead‑time changes the effective duty cycle
Q.129 Which PWM method is specifically designed to minimize the number of switching transitions while achieving a target output voltage?
Space Vector PWM
Selective Harmonic Elimination PWM
Random PWM
Phase‑Shifted PWM
Explanation - SHE‑PWM selects a minimal set of switching angles that satisfy voltage and harmonic constraints.
Correct answer is: Selective Harmonic Elimination PWM
Q.130 In a PWM inverter, the term 'carrier‑phase shift' is used to:
Synchronize the reference sinusoid with the DC bus
Reduce common‑mode voltage by offsetting carrier signals for each phase
Increase the modulation index beyond 1
Eliminate the need for dead‑time
Explanation - Phase‑shifting carriers spreads the switching events, lowering common‑mode voltage peaks.
Correct answer is: Reduce common‑mode voltage by offsetting carrier signals for each phase
Q.131 When a PWM inverter is used to drive a resistive load, the output voltage ripple primarily affects:
Current ripple
Power factor
Harmonic distortion in the supply
All of the above
Explanation - Voltage ripple causes current ripple, can degrade power factor, and injects harmonics back into the supply.
Correct answer is: All of the above
Q.132 In a PWM inverter, the fundamental frequency of the output voltage is:
Equal to the carrier frequency
Equal to the reference sinusoid frequency
Equal to the switching frequency divided by two
Independent of both carrier and reference frequencies
Explanation - The reference defines the desired output fundamental frequency.
Correct answer is: Equal to the reference sinusoid frequency
Q.133 A PWM inverter operating with a modulation index of 0.5 will have an output voltage that is:
Half of the maximum possible fundamental voltage
Double the maximum possible fundamental voltage
Equal to the DC bus voltage
Zero
Explanation - The fundamental voltage is directly proportional to the modulation index.
Correct answer is: Half of the maximum possible fundamental voltage
Q.134 In a three‑phase inverter using Space Vector PWM, the number of active voltage vectors that can be synthesized in each PWM period is:
3
6
8
12
Explanation - There are six active vectors in the space‑vector diagram for a three‑phase inverter.
Correct answer is: 6
Q.135 Which PWM technique is most commonly employed to achieve a low total harmonic distortion (THD) while maintaining a moderate switching frequency?
Sinusoidal PWM
Selective Harmonic Elimination PWM
Random PWM
Phase‑Shifted PWM
Explanation - SPWM offers a good trade‑off between THD and switching frequency, making it a standard choice.
Correct answer is: Sinusoidal PWM
Q.136 In a PWM buck‑boost converter, the output voltage can be expressed as:
V_out = D·V_in
V_out = V_in / (1 - D)
V_out = V_in·D/(1 - D)
V_out = V_in·(1 - D)
Explanation - The buck‑boost converter combines buck and boost actions, leading to V_out = V_in·D/(1−D).
Correct answer is: V_out = V_in·D/(1 - D)
Q.137 When the carrier frequency of a PWM inverter is increased, the required size of the output filter:
Increases
Decreases
Remains the same
Depends only on the load
Explanation - Higher carrier frequency pushes switching harmonics higher, allowing a smaller filter to achieve the same attenuation.
Correct answer is: Decreases
Q.138 In a PWM inverter, the term 'modulation index' (m) cannot exceed:
0.5
1.0
1.5
2.0
Explanation - m > 1 leads to over‑modulation; the linear range is limited to m ≤ 1.
Correct answer is: 1.0
Q.139 The main advantage of using Phase‑Shifted PWM in a three‑phase inverter is:
Higher fundamental voltage
Reduced common‑mode voltage and better distribution of switching events
Lower switching frequency requirement
Elimination of dead‑time
Explanation - Phase‑shifting carriers reduces simultaneous voltage steps, minimizing common‑mode stress.
Correct answer is: Reduced common‑mode voltage and better distribution of switching events
Q.140 In a PWM-controlled buck converter, the output voltage ripple is primarily reduced by:
Increasing the input voltage
Increasing the output capacitance
Increasing the switching frequency
Both B and C
Explanation - Larger output capacitance stores more charge, and higher switching frequency reduces the time between voltage updates, both reducing ripple.
Correct answer is: Both B and C
Q.141 For a PWM inverter with a carrier frequency of 12 kHz and a fundamental frequency of 50 Hz, the ratio of carrier to fundamental frequency is:
240
120
60
30
Explanation - 12 kHz / 50 Hz = 240.
Correct answer is: 240
Q.142 In a PWM inverter, the term 'carrier‑reference crossing' determines:
The magnitude of the DC bus voltage
The exact time instants when the switch toggles
The fundamental frequency of the output
The amount of dead‑time required
Explanation - Each crossing defines a PWM edge, setting the ON/OFF state.
Correct answer is: The exact time instants when the switch toggles