Q.1 Which of the following best describes a computer bus?
A pathway connecting different components of a computer
A type of CPU instruction
A storage device
An output device
Explanation - A computer bus is a set of parallel wires that allows data transfer between different components of a computer such as CPU, memory, and I/O devices.
Correct answer is: A pathway connecting different components of a computer
Q.2 What are the three main types of computer buses?
Data bus, Address bus, Control bus
Input bus, Output bus, Power bus
Instruction bus, Data bus, Program bus
Serial bus, Parallel bus, Fiber bus
Explanation - The three main types of buses in a computer system are: Data bus (transfers data), Address bus (specifies memory addresses), and Control bus (carries control signals).
Correct answer is: Data bus, Address bus, Control bus
Q.3 The width of the data bus determines:
The number of memory locations
The number of bits transmitted simultaneously
The clock speed of CPU
The type of power supply
Explanation - The data bus width determines how many bits of data can be transferred in parallel at a time between CPU, memory, and I/O devices.
Correct answer is: The number of bits transmitted simultaneously
Q.4 Which bus is responsible for carrying control signals such as read or write?
Data bus
Address bus
Control bus
Power bus
Explanation - The control bus carries control signals from the CPU to other components to manage read/write operations and other control functions.
Correct answer is: Control bus
Q.5 In a unidirectional bus system:
Data flows in both directions
Data flows in only one direction
Address is transferred with data
Control signals are ignored
Explanation - A unidirectional bus allows data to flow in only one direction at a time, unlike bidirectional buses where data can move both ways.
Correct answer is: Data flows in only one direction
Q.6 The main advantage of a multiprocessor bus system is:
Faster I/O devices
Simultaneous CPU access to memory
Reduced memory size
Single-user operation
Explanation - A multiprocessor bus allows multiple CPUs to communicate with memory and I/O devices efficiently, improving system performance.
Correct answer is: Simultaneous CPU access to memory
Q.7 Which type of bus transfers memory addresses from the CPU to memory?
Data bus
Control bus
Address bus
Instruction bus
Explanation - The address bus carries the addresses of memory locations that the CPU wants to read from or write to.
Correct answer is: Address bus
Q.8 The method where only one device can transmit on the bus at a time is called:
Multiplexing
Arbitration
Bus sharing
Bus contention
Explanation - Bus arbitration is the process of controlling which device has access to the bus at a particular time to avoid conflicts.
Correct answer is: Arbitration
Q.9 Which of the following is a disadvantage of a single bus structure?
High cost
Limited data transfer rate due to bus contention
Complex design
Multiple control lines required
Explanation - In a single bus structure, only one data transfer can occur at a time, which can cause delays when multiple devices need the bus.
Correct answer is: Limited data transfer rate due to bus contention
Q.10 In synchronous bus communication, data transfer is coordinated by:
Control signals only
A common clock signal
CPU instructions
Memory addresses
Explanation - Synchronous bus systems use a shared clock signal to synchronize the timing of data transfers between devices.
Correct answer is: A common clock signal
Q.11 What does 'bus width' refer to?
Number of bits transmitted in parallel
Length of the bus in meters
Number of devices on the bus
Number of control lines
Explanation - Bus width defines the number of bits that can be transmitted simultaneously over the bus, affecting overall data transfer rate.
Correct answer is: Number of bits transmitted in parallel
Q.12 A bus that allows data transfer in both directions is called:
Unidirectional bus
Bidirectional bus
Address bus
Control bus
Explanation - A bidirectional bus permits data to flow in both directions, enabling devices to send and receive data over the same lines.
Correct answer is: Bidirectional bus
Q.13 Which of the following improves bus utilization?
Increasing bus width
Using separate buses for data, address, and control
Bus multiplexing
Using a single unidirectional bus
Explanation - Bus multiplexing allows the same physical bus lines to be used for multiple purposes (address and data), improving utilization.
Correct answer is: Bus multiplexing
Q.14 What is the function of a tri-state buffer in bus systems?
Amplify signals
Enable multiple devices to share a bus without conflict
Store data temporarily
Convert serial data to parallel
Explanation - Tri-state buffers allow multiple devices to connect to a common bus, outputting data only when enabled, otherwise staying in a high-impedance state.
Correct answer is: Enable multiple devices to share a bus without conflict
Q.15 Which technique is used to transfer data without CPU intervention?
Memory-mapped I/O
Programmed I/O
Direct Memory Access (DMA)
Interrupt-driven I/O
Explanation - DMA allows devices to transfer data directly to/from memory without CPU involvement, freeing CPU for other tasks.
Correct answer is: Direct Memory Access (DMA)
Q.16 In memory-mapped I/O, I/O devices are:
Assigned special I/O instructions
Mapped to specific memory addresses
Accessible only by CPU registers
Connected to a separate bus
Explanation - Memory-mapped I/O assigns memory addresses to I/O devices, allowing the CPU to access them using normal memory instructions.
Correct answer is: Mapped to specific memory addresses
Q.17 Which bus structure reduces the number of physical lines required?
Dedicated bus
Multiplexed bus
Unidirectional bus
Control bus only
Explanation - A multiplexed bus shares the same lines for multiple purposes, such as transferring both address and data, reducing the number of physical connections.
Correct answer is: Multiplexed bus
Q.18 Which type of bus arbitration uses a central controller?
Distributed arbitration
Centralized arbitration
Token passing
Time-division multiplexing
Explanation - Centralized arbitration uses a single controller to grant bus access to devices, ensuring orderly communication.
Correct answer is: Centralized arbitration
Q.19 In asynchronous bus communication, data transfer is:
Synchronized with a clock signal
Triggered by handshake signals
Faster than synchronous transfer
Controlled by memory addresses
Explanation - Asynchronous buses do not use a common clock; data transfer occurs using request/acknowledge handshake signals between devices.
Correct answer is: Triggered by handshake signals
Q.20 Which type of bus allows multiple devices to communicate without collision?
Shared single bus
Multiplexed bus
Differential bus
Multibus with arbitration
Explanation - A multibus system with arbitration allows multiple devices to access the bus safely by resolving conflicts and avoiding collisions.
Correct answer is: Multibus with arbitration